Datasheet

Memory Map
Technical Data MC68HC908LJ12 — Rev. 2.1
52 Memory Map Freescale Semiconductor
$003B
PLL Reference Divider
Select Register
(PMDS)
Read: 0000
RDS3 RDS2 RDS1 RDS0
Write:
Reset:
0
00
0
0001
$003C
ADC Status and Control
Register
(ADSCR)
Read: COCO
AIEN ADCO ADCH4 ADCH3 ADCH2 ADCH1 ADCH0
Write:
Reset:00011111
$003D
ADC Data Register High
(ADRH)
Read: ADx ADx ADx ADx ADx ADx ADx ADx
Write:RRRRRRRR
Reset:00000000
$003E
ADC Data Register Low
(ADRL)
Read: ADx ADx ADx ADx ADx ADx ADx ADx
Write:RRRRRRRR
Reset:00000000
$003F
ADC Clock Register
(ADCLK)
Read:
ADIV2 ADIV1 ADIV0 ADICLK MODE1 MODE0
00
Write:
R
Reset:00000100
$0040
Unimplemented
Read:
Write:
Reset:
$0041 Unimplemented
Read:
Write:
Reset:
$0042
RTC Control Register 1
(RTCCR1)
Read:
ALMIE CHRIE DAYIE HRIE MINIE SECIE TB1IE TB2IE
Write:
Reset:00000000
$0043
RTC Control Register 2
(RTCCR2)
Read: 0
0
CHRE RTCE
0
XTL2 XTL1 XTL0
Write: R CHRCLR
Reset:00000000
$0044
RTC Status Register
(RTCSR)
Read: ALMF CHRF DAYF HRF MINF SECF TB1F TB2F
Write:
Reset:00000000
Addr.Register Name Bit 7654321Bit 0
U = Unaffected X = Indeterminate
= Unimplemented R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 7 of 12)