Datasheet

Memory Map
Technical Data MC68HC908LJ12 — Rev. 2.1
46 Memory Map Freescale Semiconductor
Addr.Register Name Bit 7654321Bit 0
$0000
Port A Data Register
(PTA)
Read:
PTA7 PTA6 PTA5 PTA4 PTA3 PTA2 PTA1 PTA0
Write:
Reset:UUUUUUUU
$0001
Port B Data Register
(PTB)
Read:
PTB7 PTB6 PTB5 PTB4 PTB3 PTB2 PTB1 PTB0
Write:
Reset:UUUUUUUU
$0002
Port C Data Register
(PTC)
Read:
PTC7 PTC6 PTC5 PTC4 PTC3 PTC2 PTC1 PTC0
Write:
Reset:UUUUUUUU
$0003
Port D Data Register
(PTD)
Read:
PTD7 PTD6 PTD5 PTD4 PTD3 PTD2 PTD1 PTD0
Write:
Reset:UUUUUUUU
$0004
Data Direction Register A
(DDRA)
Read:
DDRA7 DDRA6 DDRA5 DDRA4 DDRA3 DDRA2 DDRA1 DDRA0
Write:
Reset:00000000
$0005
Data Direction Register B
(DDRB)
Read:
DDRB7 DDRB6 DDRB5 DDRB4 DDRB3 DDRB2 DDRB1 DDRB0
Write:
Reset:00000000
$0006
Data Direction Register C
(DDRC)
Read:
DDRC7 DDRC6 DDRC5 DDRC4 DDRC3 DDRC2 DDRC1 DDRC0
Write:
Reset:00000000
$0007
Data Direction Register D
(DDRD)
Read:
DDRD7 DDRD6 DDRD5 DDRD4 DDRD3 DDRD2 DDRD1 DDRD0
Write:
Reset:00000000
$0008 Unimplemented
Read:
Write:
Reset:
$0009 Unimplemented
Read:
Write:
Reset:
U = Unaffected X = Indeterminate
= Unimplemented R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 1 of 12)