Datasheet

Electrical Specifications
MC68HC908LJ12 — Rev. 2.1 Technical Data
Freescale Semiconductor Electrical Specifications 395
Notes:
1. V
DD
= 4.5 to 5.5 Vdc, V
SS
= 0 Vdc, T
A
= T
L
to T
H
, unless otherwise noted.
2. Typical values reflect average measurements at midpoint of voltage range, 25 °C only.
3. Run (operating) I
DD
measured using external square wave clock source. All inputs 0.2 V from rail. No dc loads. Less than
100 pF on all outputs. C
L
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects run I
DD
.
4. Wait I
DD
measured using external square wave clock source. All inputs 0.2 V from rail. No dc loads. Less than 100 pF on
all outputs. C
L
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects wait I
DD
.
5. The 8kHz clock is from a 32kHz clock input at OSC1, for the driving the RTC.
6. LCD driver configured for high current mode.
7. Maximum is highest voltage that POR is guaranteed.
8. If minimum V
DD
is not reached before the internal POR reset is released, RST must be driven low externally until minimum
V
DD
is reached.
9. R
PU1
and R
PU2
are measured at V
DD
= 5.0V