Datasheet

MC68HC908LJ12 — Rev. 2.1 Technical Data
Freescale Semiconductor Input/Output (I/O) Ports 341
Technical Data — MC68HC908LJ12
Section 17. Input/Output (I/O) Ports
17.1 Contents
17.2 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .341
17.3 Port A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .344
17.3.1 Port A Data Register (PTA) . . . . . . . . . . . . . . . . . . . . . . . .344
17.3.2 Data Direction Register A (DDRA) . . . . . . . . . . . . . . . . . . .345
17.4 Port B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .347
17.4.1 Port B Data Register (PTB) . . . . . . . . . . . . . . . . . . . . . . . .347
17.4.2 Data Direction Register B (DDRB) . . . . . . . . . . . . . . . . . . .348
17.4.3 Port B LED Control Register (LEDB) . . . . . . . . . . . . . . . . .350
17.5 Port C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .351
17.5.1 Port C Data Register (PTC) . . . . . . . . . . . . . . . . . . . . . . . .351
17.5.2 Data Direction Register C (DDRC). . . . . . . . . . . . . . . . . . .352
17.6 Port D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .354
17.6.1 Port D Data Register (PTD) . . . . . . . . . . . . . . . . . . . . . . . .354
17.6.2 Data Direction Register D (DDRD). . . . . . . . . . . . . . . . . . .355
17.2 Introduction
Thirty-two (32) bidirectional input-output (I/O) pins form four parallel
ports. All I/O pins are programmable as inputs or outputs.
NOTE: Connect any unused I/O pins to an appropriate logic level, either V
DD
or
V
SS
. Although the I/O ports do not require termination for proper
operation, termination reduces excess current consumption and the
possibility of electrostatic damage.