Datasheet

Serial Peripheral Interface Module (SPI)
MC68HC908LJ12 — Rev. 2.1 Technical Data
Freescale Semiconductor Serial Peripheral Interface Module (SPI) 293
When an SPI is configured as a master, the SS input can be used in
conjunction with the MODF flag to prevent multiple masters from driving
MOSI and SPSCK. (See 14.8.2 Mode Fault Error.) For the state of the
SS pin to set the MODF flag, the MODFEN bit in the SPSCK register
must be set. If the MODFEN bit is low for an SPI master, the SS pin can
be used as a general-purpose I/O under the control of the data direction
register of the shared I/O port. With MODFEN high, it is an input-only pin
to the SPI regardless of the state of the data direction register of the
shared I/O port.
The CPU can always read the state of the SS pin by configuring the
appropriate pin as an input and reading the port data register. (See
Table 14-3.)
14.13.5 CGND (Clock Ground)
CGND is the ground return for the serial clock pin, SPSCK, and the
ground for the port output buffers. It is internally connected to V
SS
as
shown in Table 14-1.
Table 14-3. SPI Configuration
SPE SPMSTR MODFEN SPI Configuration State of SS Logic
0
X
(1)
X Not enabled
General-purpose I/O;
SS
ignored by SPI
1 0 X Slave Input-only to SPI
1 1 0 Master without MODF
General-purpose I/O;
SS
ignored by SPI
1 1 1 Master with MODF Input-only to SPI
Note 1. X = Don’t care