Datasheet

Real Time Clock (RTC)
MC68HC908LJ12 — Rev. 2.1 Technical Data
Freescale Semiconductor Real Time Clock (RTC) 219
XTL[2:0] — Crystal Frequency Select Bits
These three bits set the prescalers/dividers for proper operation of the
RTC module for various crystal (CGMXCLK) input frequencies. The
XTL[2:0] bits can only be written once after reset, subsequent writes
to these bits will have no effect on its content. Table 12-1 shows the
XTL[2:0] settings for various CGMXCLK frequencies. Reset clear the
XTL[2:0] bits.
12.6.3 RTC Status Register (RTCSR)
The RTC status register contains eight status flags. When a flag is set
and the corresponding interrupt enable bit is also set, a CPU interrupt
request is generated.
Table 12-1. CGMXCLK Frequency for RTC Input Reference
CGMXCLK
(1)
Notes:
1. Using crystal frequencies other than these specified will cause incorrect timings in the RTC
module.
XTL2 XTL1 XTL0
32.768 kHz 0 0 0
Reserved 001
32.000 kHz 0 1 0
38.400 kHz 0 1 1
64.000 kHz 1 X 0
76.800 kHz 1 X 1
Address: $0044
Read: ALMF CHRF DAYF HRF MINF SECF TB1F TB2F
Write:
Reset:00000000
= Unimplemented
Figure 12-5. RTC Status Register (RTCSR)