Datasheet

Timer Interface Module (TIM)
MC68HC908LJ12 — Rev. 2.1 Technical Data
Freescale Semiconductor Timer Interface Module (TIM) 189
Addr.Register Name Bit 7654321Bit 0
$0020
Timer 1 Status and
Control Register
(T1SC)
Read: TOF
TOIE TSTOP
00
PS2 PS1 PS0
Write: 0 TRST
Reset:00100000
$0021
Timer 1 Counter
Register High
(T1CNTH)
Read: Bit 15 14 13 12 11 10 9 Bit 8
Write:
Reset:00000000
$0022
Timer 1 Counter
Register Low
(T1CNTL)
Read: Bit 7 654321Bit 0
Write:
Reset:00000000
$0023
Timer 1 Counter Modulo
Register High
(T1MODH)
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
Reset:11111111
$0024
Timer 1 Counter Modulo
Register Low
(T1MODL)
Read:
Bit 7654321Bit 0
Write:
Reset:11111111
$0025
Timer 1 Channel 0 Status
and Control Register
(T1SC0)
Read: CH0F
CH0IE MS0B MS0A ELS0B ELS0A TOV0 CH0MAX
Write: 0
Reset:00000000
$0026
Timer 1 Channel 0
Register High
(T1CH0H)
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
Reset: Indeterminate after reset
$0027
Timer 1 Channel 0
Register Low
(T1CH0L)
Read:
Bit 7654321Bit 0
Write:
Reset: Indeterminate after reset
$0028
Timer 1 Channel 1 Status
and Control Register
(T1SC1)
Read: CH1F
CH1IE
0
MS1A ELS1B ELS1A TOV1 CH1MAX
Write: 0
Reset:00000000
= Unimplemented
Figure 11-2. TIM I/O Register Summary (Sheet 1 of 3)