Datasheet

Timer Interface Module (TIM)
Technical Data MC68HC908LJ12 — Rev. 2.1
188 Timer Interface Module (TIM) Freescale Semiconductor
Figure 11-1. TIM Block Diagram
Figure 11-2 summarizes the timer registers.
NOTE: References to either timer 1 or timer 2 may be made in the following text
by omitting the timer number. For example, TSC may generically refer to
both T1SC and T2SC.
PRESCALER
PRESCALER SELECT
INTERNAL
16-BIT COMPARATOR
PS2 PS1 PS0
16-BIT COMPARATOR
16-BIT LATCH
TCH0H:TCH0L
MS0A
ELS0B ELS0A
TOF
TOIE
16-BIT COMPARATOR
16-BIT LATCH
TCH1H:TCH1L
CHANNEL 0
CHANNEL 1
TMODH:TMODL
TRST
TSTOP
TOV0
CH0IE
CH0F
ELS1B ELS1A
TOV1
CH1IE
CH1MAX
CH1F
CH0MAX
MS0B
16-BIT COUNTER
INTERNAL BUS
BUS CLOCK
MS1A
T[1,2]CH0
T[1,2]CH1
INTERRUPT
LOGIC
PORT
LOGIC
INTERRUPT
LOGIC
INTERRUPT
LOGIC
PORT
LOGIC