Datasheet

Monitor ROM (MON)
Technical Data MC68HC908LJ12 — Rev. 2.1
158 Monitor ROM (MON) Freescale Semiconductor
Figure 10-1. Monitor Mode Circuit
+
+
+
MC145407
MC74HC125
RST
IRQ
CGMXFC
OSC1
OSC2
V
SS
V
DD
PTA0
V
DD
10 k Ω
0.1 µ F
10 k
Ω
6
5
2
4
3
1
DB-25
2
3
7
20
18
17
19
16
15
V
DD
V
DD
V
DD
10 µ F
10
µ F10 µ F
10
µ F
1
2
4
7
14
3
0.1
µ F
PTC1
V
DD
B
A
(SEE NOTE 1)
56
+
V
DD
PTA1
PTA2
68HC908LJ12
$FFFF
$FFFE
RESET VECTORS
D
C
C
C
D
D
6–30 pF
6–30 pF
32.768 kHz XTAL
10 M
Ω
SW2
SW1
SW4
SW3
(SEE NOTE 2)
(SEE NOTES 2
(SEE NOTE 2)
(SEE NOTE 3)
Notes:
1. For monitor mode entry when IRQ
= V
TST
:
SW1: Position A — Bus clock = CGMXCLK ÷ 4 or CGMPCLK ÷ 4
SW1: Position B — Bus clock = CGMXCLK ÷ 2
2. SW2, SW3, and SW4: Position C — Enter monitor mode using external oscillator.
SW2, SW3, and SW4: Position D — Enter monitor mode using external XTAL and internal PLL.
3. See 23.6 5.0V DC Electrical Characteristics for IRQ
voltage level requirements.
10 k Ω
0.01 µF
0.033 µF
V
TST
330 k Ω
AND 3)
V
REFL
V
REFH
V
DDA
EXTERNAL OSCILLATOR
MUST BE USED FOR
MONITOR MODE ENTRY
WHEN IRQ
= V
TST