Datasheet

Monitor ROM (MON)
Technical Data MC68HC908LJ12 — Rev. 2.1
156 Monitor ROM (MON) Freescale Semiconductor
10.2 Introduction
This section describes the monitor ROM (MON) and the monitor mode
entry methods. The monitor ROM allows complete testing of the MCU
through a single-wire interface with a host computer. Monitor mode entry
can be achieved without use of the higher test voltage, V
TST
, as long as
vector addresses $FFFE and $FFFF are blank, thus reducing the
hardware requirements for in-circuit programming.
In addition, to simply user coding, routines are also stored in the monitor
ROM area for FLASH memory program /erase and EEPROM emulation.
10.3 Features
Features of the monitor ROM include:
• Normal user-mode pin functionality
• One pin dedicated to serial communication between monitor ROM
and host computer
• Standard mark/space non-return-to-zero (NRZ) communication
with host computer
• Execution of code in RAM or FLASH
• FLASH memory security feature
1
• FLASH memory programming interface
• Enhanced PLL (phase-locked loop) option to allow use of external
32.768-kHz crystal to generate internal frequency of 2.4576 MHz
• 960 bytes monitor ROM code size
($FC00–$FDFF and $FE10–$FFCE)
• Monitor mode entry without high voltage, V
TST
, if reset vector is
blank ($FFFE and $FFFF contain $FF)
• Standard monitor mode entry if high voltage, V
TST
, is applied to
IRQ
• Resident routines for in-circuit programming and EEPROM
emulation
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or
copying the FLASH difficult for unauthorized users.