Datasheet

Input/Output (I/O) Section
MC68HC908QY/QT Family Data Sheet, Rev. 6
Freescale Semiconductor 29
$0022
TIM Counter Register Low
(TCNTL)
See page 128.
Read: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Write:
Reset:00000000
$0023
TIM Counter Modulo
Register High (TMODH)
See page 129.
Read:
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Write:
Reset:11111111
$0024
TIM Counter Modulo
Register Low (TMODL)
See page 129.
Read:
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Write:
Reset:11111111
$0025
TIM Channel 0 Status and
Control Register (TSC0)
See page 130.
Read: CH0F
CH0IE MS0B MS0A ELS0B ELS0A TOV0 CH0MAX
Write: 0
Reset:00000000
$0026
TIM Channel 0
Register High (TCH0H)
See page 132.
Read:
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Write:
Reset: Indeterminate after reset
$0027
TIM Channel 0
Register Low (TCH0L)
See page 132.
Read:
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Write:
Reset: Indeterminate after reset
$0028
TIM Channel 1 Status and
Control Register (TSC1)
See page 130.
Read: CH1F
CH1IE
0
MS1A ELS1B ELS1A TOV1 CH1MAX
Write: 0
Reset:00000000
$0029
TIM Channel 1
Register High (TCH1H)
See page 132.
Read:
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Write:
Reset: Indeterminate after reset
$002A
TIM Channel 1
Register Low (TCH1L)
See page 132.
Read:
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Write:
Reset: Indeterminate after reset
$002B
↓
$0035
Unimplemented
$0036
Oscillator Status Register
(OSCSTAT)
See page 96.
Read:
RRRRRRECGON
ECGST
Write:
Reset:00000000
$0037 Unimplemented Read:
$0038
Oscillator Trim Register
(OSCTRIM)
See page 96.
Read:
TRIM7 TRIM6 TRIM5 TRIM4 TRIM3 TRIM2 TRIM1 TRIM0
Write:
Reset:10000000
Addr.Register Name Bit 7654321Bit 0
= Unimplemented R = Reserved U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 3 of 5)