Datasheet

Memory
MC68HC908QY/QT Family Data Sheet, Rev. 6
26 Freescale Semiconductor
$0000
↓
$003F
I/O REGISTERS
64 BYTES
Note 1.
Attempts to execute code from addresses in this
range will generate an illegal address reset.
$0040
↓
$007F
RESERVED
(1)
64 BYTES
$0080
↓
$00FF
RAM
128 BYTES
$0100
↓
$27FF
UNIMPLEMENTED
(1)
9984 BYTES
$2800
↓
$2DFF
AUXILIARY ROM
1536 BYTES
$2E00
↓
$EDFF
UNIMPLEMENTED
(1)
49152 BYTES
UNIMPLEMENTED
51712 BYTES
$2E00
↓
$F7FF
$EE00
↓
$FDFF
FLASH MEMORY
MC68HC908QT4 AND MC68HC908QY4
4096 BYTES
FLASH MEMORY
1536 BYTES
$F800
↓
$FDFF
$FE00 BREAK STATUS REGISTER (BSR)
MC68HC908QT1, MC68HC908QT2,
MC68HC908QY1, and MC68HC908QY2
Memory Map
$FE01 RESET STATUS REGISTER (SRSR)
$FE02 BREAK AUXILIARY REGISTER (BRKAR)
$FE03 BREAK FLAG CONTROL REGISTER (BFCR)
$FE04 INTERRUPT STATUS REGISTER 1 (INT1)
$FE05 INTERRUPT STATUS REGISTER 2 (INT2)
$FE06 INTERRUPT STATUS REGISTER 3 (INT3)
$FE07
RESERVED FOR FLASH TEST CONTROL REGISTER (FLTCR)
$FE08
FLASH CONTROL REGISTER (FLCR)
$FE09 BREAK ADDRESS HIGH REGISTER (BRKH)
$FE0A BREAK ADDRESS LOW REGISTER (BRKL)
$FE0B BREAK STATUS AND CONTROL REGISTER (BRKSCR)
$FE0C LVISR
$FE0D
↓
$FE0F
RESERVED FOR FLASH TEST
3 BYTES
$FE10
↓
$FFAF
MONITOR ROM 416 BYTES
$FFB0
↓
$FFBD
FLASH
14 BYTES
$FFBE FLASH BLOCK PROTECT REGISTER (FLBPR)
$FFBF
RESERVED FLASH
$FFC0 INTERNAL OSCILLATOR TRIM VALUE (VDD = 5.0 V)
$FFC1 INTERNAL OSCILLATOR TRIM VALUE (VDD = 3.0 V)
$FFC2
↓
$FFCF
FLASH
14 BYTES
$FFD0
↓
$FFFF
USER VECTORS
48 BYTES
Figure 2-1. Memory Map