Datasheet

5-V DC Electrical Characteristics
MC68HC908QY/QT Family Data Sheet, Rev. 6
Freescale Semiconductor 151
16.5 5-V DC Electrical Characteristics
Characteristic
(1)
1. V
DD
= 4.5 to 5.5 Vdc, V
SS
= 0 Vdc, T
A
= T
L
to T
H
, unless otherwise noted.
Symbol Min
Typ
(2)
2. Typical values reflect average measurements at midpoint of voltage range, 25•C only.
Max Unit
Output high voltage
I
Load
= –2.0 mA, all I/O pins
I
Load
= –10.0 mA, all I/O pins
I
Load
= –15.0 mA, PTA0, PTA1, PTA3–PTA5 only
V
OH
V
DD
–0.4
V
DD
–1.5
V
DD
–0.8
V
Maximum combined I
OH
(all I/O pins) I
OHT
——50mA
Output low voltage
I
Load
= 1.6 mA, all I/O pins
I
Load
= 10.0 mA, all I/O pins
I
Load
= 15.0 mA, PTA0, PTA1, PTA3–PTA5 only
V
OL
0.4
1.5
0.8
V
Maximum combined I
OL
(all I/O pins) I
OLT
——50mA
Input high voltage
PTA0–PTA5, PTB0–PTB7
V
IH
0.7 x V
DD
V
DD
V
Input low voltage
PTA0–PTA5, PTB0–PTB7
V
IL
V
SS
0.3 x V
DD
V
Input hysteresis
V
HYS
0.06 x V
DD
——V
DC injection current, all ports
I
INJ
–2 +2 mA
Total dc current injection (sum of all I/O)
I
INJTOT
–25 +25 mA
Ports Hi-Z leakage current
I
IL
–1 ±0.1 +1 μA
Capacitance
Ports (as input)
Ports (as input)
C
IN
C
OUT
12
8
pF
POR rearm voltage
(3)
3. Maximum is highest voltage that POR is guaranteed.
V
POR
0—100mV
POR rise time ramp rate
(4)
4. If minimum V
DD
is not reached before the internal POR reset is released, the LVI will hold the part in reset until minimum
V
DD
is reached.
R
POR
0.035 V/ms
Monitor mode entry voltage
V
TST
V
DD
+ 2.5
—9.1V
Pullup resistors
(5)
PTA0–PTA5, PTB0–PTB7
5. R
PU
is measured at
V
DD
= 5.0 V.
R
PU
16 26 36 kΩ
Low-voltage inhibit reset, trip falling voltage
V
TRIPF
3.90 4.20 4.50 V
Low-voltage inhibit reset, trip rising voltage
V
TRIPR
4.00 4.30 4.60 V
Low-voltage inhibit reset/recover hysteresis
V
HYS
100 mV