Datasheet

Monitor Module (MON)
MC68HC908QY/QT Family Data Sheet, Rev. 6
Freescale Semiconductor 145
The monitor ROM firmware echoes each received byte back to the PTA0 pin for error checking. An 11-bit
delay at the end of each command allows the host to send a break character to cancel the command. A
delay of two bit times occurs before each echo and before READ, IREAD, or READSP data is returned.
The data returned by a read command appears after the echo of the last byte of the command.
NOTE
Wait one bit time after each echo before sending the next byte.
Figure 15-15. Read Transaction
Figure 15-16. Write Transaction
A brief description of each monitor mode command is given in Table 15-3 through Table 15-8.
Table 15-3. READ (Read Memory) Command
Description Read byte from memory
Operand 2-byte address in high-byte:low-byte order
Data Returned Returns contents of specified address
Opcode $4A
Command Sequence
READ
READ
ECHO
FROM
HOST
ADDRESS
HIGH
ADDRESS
HIGH
ADDRESS
LOW
ADDRESS
LOW
DATA
RETURN
13, 2114
4
Notes:
2 = Data return delay, 2 bit times
3 = Cancel command delay, 11 bit times
4 = Wait 1 bit time before sending next byte.
44
1 = Echo delay, 2 bit times
WRITE
WRITE
ECHO
FROM
HOST
ADDRESS
HIGH
ADDRESS
HIGH
ADDRESS
LOW
ADDRESS
LOW
DATA
DATA
Notes:
2 = Cancel command delay, 11 bit times
3 = Wait 1 bit time before sending next byte.
11311
3
3
32, 3
1 = Echo delay, 2 bit times
READREAD
ECHO
SENT TO MONITOR
ADDRESS
HIGH
ADDRESS
HIGH
ADDRESS
LOW
DATA
RETURN
ADDRESS
LOW