Datasheet

MC68HC908QY/QT Family Data Sheet, Rev. 6
Freescale Semiconductor 119
Chapter 14
Timer Interface Module (TIM)
14.1 Introduction
This section describes the timer interface module (TIM). The TIM is a two-channel timer that provides a
timing reference with input capture, output compare, and pulse-width-modulation functions. Figure 14-2
is a block diagram of the TIM.
14.2 Features
Features of the TIM include the following:
• Two input capture/output compare channels
– Rising-edge, falling-edge, or any-edge input capture trigger
– Set, clear, or toggle output compare action
• Buffered and unbuffered pulse width modulation (PWM) signal generation
• Programmable TIM clock input
– 7-frequency internal bus clock prescaler selection
– External TIM clock input
• Free-running or modulo up-count operation
• Toggle any channel pin on overflow
• TIM counter stop and reset bits
14.3 Pin Name Conventions
The TIM shares two input/output (I/O) pins with two port A I/O pins. The full names of the TIM I/O pins are
listed in Table 14-1. The generic pin name appear in the text that follows.
Table 14-1. Pin Name Conventions
TIM Generic Pin Names: TCH0 TCH1 TCLK
Full TIM Pin Names: PTA0/TCH0 PTA1/TCH1 PTA2/TCLK