Datasheet

Input/Output Ports (PORTS)
MC68HC908QY/QT Family Data Sheet, Rev. 6
102 Freescale Semiconductor
12.3.3 Port B Input Pullup Enable Register
The port B input pullup enable register (PTBPUE) contains a software configurable pullup device for each
of the eight port B pins. Each bit is individually configurable and requires the corresponding data direction
register, DDRBx, be configured as input. Each pullup device is automatically and dynamically disabled
when its corresponding DDRBx bit is configured as output.
PTBPUE[7:0] — Port B Input Pullup Enable Bits
These read/write bits are software programmable to enable pullup devices on port B pins
1 = Corresponding port B pin configured to have internal pull if its DDRB bit is set to 0
0 = Pullup device is disconnected on the corresponding port B pin regardless of the state of its
DDRB bit.
Table 12-3 summarizes the operation of the port B pins.
Address:
$000C
Bit 7654321Bit 0
Read:
PTBPUE7 PTBPUE6 PTBPUE5 PTBPUE4 PTBPUE3 PTBPUE2 PTBPUE2 PTBPUE0
Write:
Reset:00000000
Figure 12-8. Port B Input Pullup Enable Register (PTBPUE)
Table 12-3. Port B Pin Functions
PTBPUE
Bit
DDRB
Bit
PTB
Bit
I/O Pin
Mode
Accesses to DDRB Accesses to PTB
Read/Write Read Write
10
X
(1)
1. X = don’t care
Input, V
DD
(2)
2. I/O pin pulled to V
DD
by internal pullup.
DDRB7–DDRB0 Pin
PTB7–PTB0
(3)
3. Writing affects data register, but does not affect input.
00X
Input, Hi-Z
(4)
4. Hi-Z = high impedance
DDRB7–DDRB0 Pin
PTB7–PTB0
(3)
X 1 X Output DDRB7–DDRB0 PTB7–PTB0 PTB7–PTB0