Datasheet

Low Power Modes

Technical Data MC68HC908GR8 — Rev 4.0

58 Low Power Modes MOTOROLA

– $FFEC and $FFED; TIM2 overflow

– $FFF0 and $FFF1; TIM2 channel 0

• Serial peripheral interface module (SPI) interrupt — A CPU

interrupt request from the SPI loads the program counter with the

contents of:

– $FFE8 and $FFE9; SPI transmitter

– $FFEA and $FFEB; SPI receiver

• Serial communications interface module (SCI) interrupt — A CPU

interrupt request from the SCI loads the program counter with the

contents of:

– $FFE2 and $FFE3; SCI transmitter

– $FFE4 and $FFE5; SCI receiver

– $FFE6 and $FFE7; SCI receiver error

• Analog-to-digital converter module (ADC) interrupt — A CPU

interrupt request from the ADC loads the program counter with the

contents of: $FFDE and $FFDF; ADC conversion complete.

• Timebase module (TBM) interrupt — A CPU interrupt request from

the TBM loads the program counter with the contents of: $FFDC

and $FFDD; TBM interrupt.

3.16 Exiting Stop Mode

These events restart the system clocks and load the program counter

with the reset vector or with an interrupt vector:

• External reset — A logic 0 on the RST pin resets the MCU and

loads the program counter with the contents of locations $FFFE

and $FFFF.

• External interrupt — A high-to-low transition on an external

interrupt pin loads the program counter with the contents of

locations:

– $FFFA and $FFFB; IRQ pin

– $FFDE and $FFDF; keyboard interrupt pins

Frees

cale Semiconductor,

Freescale Semiconductor, Inc.

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