Datasheet

Memory Map
Input/Output (I/O) Section
MC68HC908GR8 — Rev 4.0 Technical Data
MOTOROLA Memory Map 45
$003C
Analog-to-Digital Status
and Control Register
(ADSCR)
Read: COCO
AIEN ADCO ADCH4 ADCH3 ADCH2 ADCH1 ADCH0
Write: R
Reset:00011111
$003D
Analog-to-Digital Data
Register (ADR)
Read: AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
Write:RRRRRRRR
Reset: Indeterminate after reset
$003E
Analog-to-Digital Input
Clock Register (ADCLK)
Read:
ADIV2 ADIV1 ADIV0 ADICLK
0000
Write: RRRR
Reset:00000000
$003F Unimplemented
Read:
Write:
Reset:
$FE00
SIM Break Status Register
(SBSR)
Read:
RRRRRR
SBSW
R
Write: NOTE
Reset:00000000
Note: Writing a logic 0 clears SBSW.
$FE01
SIM Reset Status Register
(SRSR)
Read: POR PIN COP ILOP ILAD MODRST LVI 0
Write:
POR:10000000
$FE02 Unimplemented
Read:
Write:
Reset:
$FE03
SIM Break Flag Control
Register (SBFCR)
Read:
BCFERRRRRRR
Write:
Reset: 0
$FE09
Interrupt Status Register 1
(INT1)
Read: IF6 IF5 IF4 IF3 IF2 IF1 0 0
Write:RRRRRRRR
Reset:00000000
$FE0A
Interrupt Status Register 2
(INT2)
Read: IF14 IF13 IF12 IF11 IF10 IF9 IF8 IF7
Write:RRRRRRRR
Reset:00000000
Addr.Register Name Bit 7654321Bit 0
= Unimplemented R = Reserved U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 7 of 8)
Frees
cale Semiconductor,
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Freescale Semiconductor, Inc.
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