Datasheet

Memory Map
Technical Data MC68HC908GR8 — Rev 4.0
44 Memory Map MOTOROLA
$0032
Timer 2 Channel 0
Register Low (T2CH0L)
Read:
Bit 7654321Bit 0
Write:
Reset: Indeterminate after reset
$0033
Unimplemented
Read:
Write:
Reset:00000000
$0034 Unimplemented
Read:
Write:
Reset: Indeterminate after reset
$0035 Unimplemented
Read:
Write:
Reset: Indeterminate after reset
$0036
PLL Control Register
(PCTL)
Read:
PLLIE
PLLF
PLLON BCS PRE1 PRE0 VPR1 VPR0
Write:
Reset:00100000
$0037
PLL Bandwidth Control
Register (PBWC)
Read:
AUTO
LOCK
ACQ
0000
R
Write:
Reset:00000000
$0038
PLL Multiplier Select High
Register (PMSH)
Read: 0000
MUL11 MUL10 MUL9 MUL8
Write:
Reset:00000000
$0039
PLL Multiplier Select Low
Register (PMSL)
Read:
MUL7 MUL6 MUL5 MUL4 MUL3 MUL2 MUL1 MUL0
Write:
Reset:01000000
$003A
PLL VCO Select Range
Register (PMRS)
Read:
VRS7 VRS6 VRS5 VRS4 VRS3 VRS2 VRS1 VRS0
Write:
Reset:01000000
$003B
PLL Reference Divider
Select Register (PMDS)
Read: 0000
RDS3 RDS2 RDS1 RDS0
Write:
Reset:00000001
Addr.Register Name Bit 7654321Bit 0
= Unimplemented R = Reserved U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 6 of 8)
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
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