Datasheet
Memory Map
Input/Output (I/O) Section
MC68HC908GR8 — Rev 4.0 Technical Data
MOTOROLA Memory Map 39
Addr.Register Name Bit 7654321Bit 0
$0000
Port A Data Register
(PTA)
Read: 0000
PTA3 PTA2 PTA1 PTA0
Write:
Reset: Unaffected by reset
$0001
Port B Data Register
(PTB)
Read: 0 0
PTB5 PTB4 PTB3 PTB2 PTB1 PTB0
Write:
Reset: Unaffected by reset
$0002
Port C Data Register
(PTC)
Read: 000000
PTC1 PTC0
Write:
Reset: Unaffected by reset
$0003
Port D Data Register
(PTD)
Read: 0
PTD6 PTD5 PTD4 PTD3 PTD2 PTD1 PTD0
Write:
Reset: Unaffected by reset
$0004
Data Direction Register A
(DDRA)
Read: 0000
DDRA3 DDRA2 DDRA1 DDRA0
Write:
Reset:00000000
$0005
Data Direction Register B
(DDRB)
Read: 0 0
DDRB5 DDRB4 DDRB3 DDRB2 DDRB1 DDRB0
Write:
Reset:00000000
$0006
Data Direction Register C
(DDRC)
Read: 000000
DDRC1 DDRC0
Write:
Reset:00000000
$0007
Data Direction Register D
(DDRD)
Read: 0
DDRD6 DDRD5 DDRD4 DDRD3 DDRD2 DDRD1 DDRD0
Write:
Reset:00000000
$0008
Port E Data Register
(PTE)
Read: 000000
PTE1 PTE0
Write:
Reset: Unaffected by reset
$0009 Unimplemented
Read:
Write:
Reset:00000000
= Unimplemented R = Reserved U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 1 of 8)
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
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