Datasheet

Electrical Specifications
3.0 V SPI Characteristics
MC68HC908GR8 Rev 4.0 Technical Data
MOTOROLA Electrical Specifications 381
Figure 23-16. SPI Master Timing
NOTE
Note: This first clock edge is generated internally, but is not seen at the SPSCK pin.
SS PIN OF MASTER HELD HIGH
MSB IN
SS
INPUT
SPSCK OUTPUT
SPSCK OUTPUT
MISO
INPUT
MOSI
OUTPUT
NOTE
4
5
5
1
4
BITS 61 LSB IN
MASTER MSB OUT BITS 61 MASTER LSB OUT
11 10 11
76
NOTE
Note: This last clock edge is generated internally, but is not seen at the SPSCK pin.
SS PIN OF MASTER HELD HIGH
MSB IN
SS
INPUT
SPSCK OUTPUT
SPSCK OUTPUT
MISO
INPUT
MOSI
OUTPUT
NOTE
4
5
5
1
4
BITS 61 LSB IN
MASTER MSB OUT BITS 61 MASTER LSB OUT
10
11
10
76
a) SPI Master Timing (CPHA = 0)
b) SPI Master Timing (CPHA = 1)
CPOL = 0
CPOL = 1
CPOL = 0
CPOL = 1
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
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