Datasheet

Memory Map
Technical Data MC68HC908GR8 — Rev 4.0
36 Memory Map MOTOROLA
2.4 Reserved Memory Locations
Accessing a reserved location can have unpredictable effects on MCU
operation. In the Figure 2-1 and in register figures in this document,
reserved locations are marked with the word Reserved or with the letter
R.
2.5 Input/Output (I/O) Section
Most of the control, status, and data registers are in the zero page area
of $0000–$003F. Additional I/O registers have these addresses:
• $FE00; SIM break status register, SBSR
• $FE01; SIM reset status register, SRSR
• $FE03; SIM break flag control register, SBFCR
• $FE09; interrupt status register 1, INT1
• $FE0A; interrupt status register 2, INT2
• $FE0B; interrupt status register 3, INT3
• $FE07; reserved FLASH test control register, FLTCR
• $FE08; FLASH control register, FLCR
• $FE09; break address register high, BRKH
• $FE0A; break address register low, BRKL
• $FE0B; break status and control register, BRKSCR
• $FE0C; LVI status register, LVISR
• $FF7E; FLASH block protect register, FLBPR
Data registers are shown in Figure 2-2, and Table 2-1 is a list of vector
locations.
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