Datasheet

Timer Interface Module (TIM)
Technical Data MC68HC908GR8 — Rev 4.0
338 Timer Interface Module (TIM) MOTOROLA
Figure 22-1. TIM Block Diagram
NOTE: References to either timer 1 or timer 2 may be made in the following text
by omitting the timer number. For example, TSC may generically refer to
both T1SC and T2SC.
NOTE: In Figure 22-1, channel1 will only be available in TIM1 while channel 0
will be available in both TIM1 and TIM2
PRESCALER
PRESCALER SELECT
INTERNAL
16-BIT COMPARATOR
PS2 PS1 PS0
16-BIT COMPARATOR
16-BIT LATCH
TCH0H:TCH0L
MS0A
ELS0B ELS0A
PORT
TOF
TOIE
INTER-
16-BIT COMPARATOR
16-BIT LATCH
TCH1H:TCH1L
CHANNEL 0
CHANNEL 1
TMODH:TMODL
TRST
TSTOP
TOV0
CH0IE
CH0F
ELS1B ELS1A
TOV1
CH1IE
CH1MAX
CH1F
CH0MAX
MS0B
16-BIT COUNTER
INTERNAL BUS
BUS CLOCK
MS1A
LOGIC
RUPT
LOGIC
INTER-
RUPT
LOGIC
PORT
LOGIC
INTER-
RUPT
LOGIC
INTERNAL
TCLK
T[1,2]CH0
T[1]CH1
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cale Semiconductor,
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