Datasheet

Timebase Module (TBM)
Technical Data MC68HC908GR8 — Rev 4.0
330 Timebase Module (TBM) MOTOROLA
21.4 Functional Description
NOTE: This module is designed for a 32.768 kHz oscillator.
This module can generate a periodic interrupt by dividing the crystal
frequency, CGMXCLK. The counter is initialized to all 0s when TBON bit
is cleared. The counter, shown in Figure 21-1, starts counting when the
TBON bit is set. When the counter overflows at the tap selected by
TBR2:TBR0, the TBIF bit gets set. If the TBIE bit is set, an interrupt
request is sent to the CPU. The TBIF flag is cleared by writing a 1 to the
TACK bit. The first time the TBIF flag is set after enabling the timebase
module, the interrupt is generated at approximately half of the overflow
period. Subsequent events occur at the exact period.
Figure 21-1. Timebase Block Diagram
÷2 ÷2 ÷2 ÷2 ÷2 ÷2 ÷2
÷2 ÷2 ÷2 ÷2 ÷2 ÷2 ÷2
÷
128
÷
32,768
÷
8192
÷
2048
CGMXCLK
SEL
0 0 0
0 0 1
0 1 0
0 1 1
TBIF
TBR1 TBR0
TBIE
TBMINT
TBON
÷2
R
TACK
TBR2
1 0 0
1 0 1
1 1 0
1 1 1
÷
64
÷
32
÷
16
÷
8
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
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