Datasheet

System Integration Module (SIM)
SIM Bus Clock Control and Generation
MC68HC908GR8 — Rev 4.0 Technical Data
MOTOROLA System Integration Module (SIM) 275
19.3 SIM Bus Clock Control and Generation
The bus clock generator provides system clock signals for the CPU and
peripherals on the MCU. The system clocks are generated from an
incoming clock, CGMOUT, as shown in Figure 19-3. This clock can
come from either an external oscillator or from the on-chip PLL. See
Clock Generator Module (CGMC).
Figure 19-3. CGM Clock Signals
19.3.1 Bus Timing
In user mode, the internal bus frequency is either the crystal oscillator
output (CGMXCLK) divided by four or the PLL output (CGMVCLK)
divided by four. See External Interrupt (IRQ).
÷ 2
BUS CLOCK
GENERATORS
SIM
SIM COUNTER
SIMOSCEN
OSCILLATOR (OSC)
OSC2
OSC1
PHASE-LOCKED LOOP (PLL)
CGMXCLK
CGMRCLK
IT12
CGMOUT
TO TIMTB15A, ADC
OSCSTOPENB
FROM
CONFIG
TO REST
OF CHIP
IT23
TO REST
OF CHIP
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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