Datasheet

Input/Output Ports (I/O)
Technical Data MC68HC908GR8 Rev 4.0
226 Input/Output Ports (I/O) MOTOROLA
TxD SCI Transmit Data Output
The PTE0/TxD pin is the transmit data output for the SCI module.
When the enable SCI bit, ENSCI, is clear, the SCI module is disabled,
and the PTE0/TxD pin is available for general-purpose I/O. See Serial
Communications Interface (SCI).
16.7.2 Data Direction Register E
Data direction register E (DDRE) determines whether each port E pin is
an input or an output. Writing a logic 1 to a DDRE bit enables the output
buffer for the corresponding port E pin; a logic 0 disables the output
buffer.
DDRE1 and DDRE0 Data Direction Register E Bits
These read/write bits control port E data direction. Reset clears
DDRE1 and DDRE0, configuring all port E pins as inputs.
1 = Corresponding port E pin configured as output
0 = Corresponding port E pin configured as input
NOTE: Avoid glitches on port E pins by writing to the port E data register before
changing data direction register E bits from 0 to 1.
Figure 16-19 shows the port E I/O logic.
Address: $000C
Bit 7654321Bit 0
Read: 000000
DDRE1 DDRE0
Write:
Reset:00000000
= Unimplemented
Figure 16-18. Data Direction Register E (DDRE)
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
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