Datasheet

Input/Output Ports (I/O)
Technical Data MC68HC908GR8 — Rev 4.0
208 Input/Output Ports (I/O) MOTOROLA
Table 16-1. Port Control Register Bits Summary
Port Bit DDR Module Control Pin
A
0 DDRA0
KBD
KBIE0 PTA0/KBD0
1 DDRA1 KBIE1 PTA1/KBD1
2 DDRA2 KBIE2 PTA2/KBD2
3 DDRA3 KBIE3 PTA3/KBD3
--- - --
--- - --
--- - --
--- - --
B
0 DDRB0
ADC
CH0 PTB0/ATD0
1 DDRB1 CH1 PTB1/ATD1
2 DDRB2 CH2 PTB2/ATD2
3 DDRB3 CH3 PTB3/ATD3
4 DDRB4 CH4 PTB4/ATD4
5 DDRB5 CH5 PTB5/ATD5
--- - --
--- - --
C
0 DDRC0 PTC0
1 DDRC1 PTC1
--- --
--- --
--- --
--- --
--- --
D
0 DDRD0
SPI
PTD0/SS
1 DDRD1 PTD1/MISO
2 DDRD2 PTD2/MOSI
3 DDRD3 PTD3/SPSCK
4 DDRD4
TIM1
PTD4/T1CH0
5 DDRD5 PTD5/T1CH1
6 DDRD6
TIM2
PTD6/T2CH0
--- --
E
0 DDRE0
SCI
PTE0/TxD
1 DDRE1 PTE1/RxD
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