Datasheet

Monitor ROM (MON)
Functional Description
MC68HC908GR8 — Rev 4.0 Technical Data
MOTOROLA Monitor ROM (MON) 197
15.4.4 Baud Rate
The communication baud rate is controlled by the crystal frequency upon
entry into monitor mode. The divide by ratio is 1024.
If monitor mode was entered with V
DD
on IRQ, then the divide by ratio is
also set at 1024. If monitor mode was entered with V
SS
on IRQ, then the
internal PLL steps up the external frequency, presumed to be 32.768
kHz, to 2.4576 MHz. These latter two conditions for monitor mode entry
require that the reset vector is blank.
Table 15-3 lists external frequencies required to achieve a standard
baud rate of 9600 BPS. Other standard baud rates can be accomplished
using proportionally higher or lower frequency generators. If using a
crystal as the clock source, be aware of the upper frequency limit that the
internal clock module can handle. See 5.0 V Control Timing and 3.0 V
Control Timing for this limit.
15.4.5 Commands
The monitor ROM firmware uses these commands:
• READ (read memory)
• WRITE (write memory)
• IREAD (indexed read)
• IWRITE (indexed write)
• READSP (read stack pointer)
• RUN (run user program)
Table 15-3. Monitor Baud Rate Selection
External
Frequency
IRQ
Internal
Frequency
Baud Rate
(BPS)
9.8304 MHz
V
TST
2.4576 MHz 9600
9.8304 MHz
V
DD
2.4576 MHz 9600
32.768 kHz
V
SS
2.4576 MHz 9600
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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