Datasheet

Central Processing Unit (CPU)
Instruction Set Summary
MC68HC908GR8 — Rev 4.0 Technical Data
MOTOROLA Central Processing Unit (CPU) 147
10.8 Instruction Set Summary
Table 10-1 provides a summary of the M68HC08 instruction set.
Table 10-1. Instruction Set Summary
Source
Form
Operation Description
Effect on
CCR
Address Mode Opcode Operand Cycles
VH I NZC
ADC #opr
ADC opr
ADC opr
ADC opr,X
ADC opr,X
ADC ,X
ADC opr,SP
ADC opr,SP
Add with Carry A
← (A) + (M) + (C) ↕↕– ↕↕↕
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
A9
B9
C9
D9
E9
F9
9EE9
9ED9
ii
dd
hh ll
ee ff
ff
ff
ee ff
2
3
4
4
3
2
4
5
ADD #opr
ADD opr
ADD opr
ADD opr,X
ADD opr,X
ADD ,X
ADD opr,SP
ADD opr,SP
Add without Carry A
← (A) + (M) ↕↕– ↕↕↕
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
AB
BB
CB
DB
EB
FB
9EEB
9EDB
ii
dd
hh ll
ee ff
ff
ff
ee ff
2
3
4
4
3
2
4
5
AIS #opr Add Immediate Value (Signed) to SP
SP
← (SP) + (16 « M)
––––––IMM A7 ii 2
AIX #opr Add Immediate Value (Signed) to H:X
H:X
← (H:X) + (16 « M)
––––––IMM AF ii 2
AND #opr
AND opr
AND opr
AND opr,X
AND opr,X
AND ,X
AND opr,SP
AND opr,SP
Logical AND A
← (A) & (M) 0 ––↕↕–
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
A4
B4
C4
D4
E4
F4
9EE4
9ED4
ii
dd
hh ll
ee ff
ff
ff
ee ff
2
3
4
4
3
2
4
5
ASL opr
ASLA
ASLX
ASL opr,X
ASL ,X
ASL opr,SP
Arithmetic Shift Left
(Same as LSL)
↕ ––↕↕↕
DIR
INH
INH
IX1
IX
SP1
38
48
58
68
78
9E68
dd
ff
ff
4
1
1
4
3
5
ASR opr
ASRA
ASRX
ASR opr,X
ASR opr,X
ASR opr,SP
Arithmetic Shift Right ↕ ––↕↕↕
DIR
INH
INH
IX1
IX
SP1
37
47
57
67
77
9E67
dd
ff
ff
4
1
1
4
3
5
BCC rel Branch if Carry Bit Clear PC
← (PC) + 2 + rel ? (C) = 0 ––––––REL 24 rr 3
C
b0
b7
0
b0
b7
C
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...