Datasheet

Computer Operating Properly (COP)
Monitor Mode
MC68HC908GR8 — Rev 4.0 Technical Data
MOTOROLA Computer Operating Properly (COP) 137
9.7 Monitor Mode
When monitor mode is entered with V
TST
on the IRQ pin, the COP is
disabled as long as V
TST
remains on the IRQ pin or the RST pin. When
monitor mode is entered by having blank reset vectors and not having
V
TST
on the IRQ pin, the COP is automatically disabled until a POR
occurs.
9.8 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power-
consumption standby modes.
9.8.1 Wait Mode
The COP remains active during wait mode. To prevent a COP reset
during wait mode, periodically clear the COP counter in a CPU interrupt
routine.
9.8.2 Stop Mode
Stop mode turns off the CGMXCLK input to the COP and clears the COP
prescaler. Service the COP immediately before entering or after exiting
stop mode to ensure a full COP timeout period after entering or exiting
stop mode.
To prevent inadvertently turning off the COP with a STOP instruction, a
configuration option is available that disables the STOP instruction.
When the STOP bit in the configuration register has the STOP
instruction disabled, execution of a STOP instruction results in an illegal
opcode reset.
9.9 COP Module During Break Mode
The COP is disabled during a break interrupt when V
TST
is present on
the RST pin.
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
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