Datasheet

Clock Generator Module (CGMC)
Functional Description
MC68HC908GR8 — Rev 4.0 Technical Data
MOTOROLA Clock Generator Module (CGMC) 101
Figure 7-1. CGMC Block Diagram
BCS
PHASE
DETECTOR
LOOP
FILTER
FREQUENCY
DIVIDER
VOLTAGE
CONTROLLED
OSCILLATOR
AUTOMATIC
MODE
CONTROL
LOCK
DETECTOR
CLOCK
CGMXCLK
CGMOUT
CGMVDV
CGMVCLK
SIMOSCEN (FROM SIM)
OSCILLATOR (OSC)
INTERRUPT
CONTROL
PLLIREQ
CGMRDV
PLL ANALOG
÷ 2
CGMRCLK
OSC2
OSC1
SELECT
CIRCUIT
V
DDA
CGMXFC V
SSA
LOCK AUTO ACQ
VPR1–VPR0
PLLIE PLLF
MUL11–MUL0
REFERENCE
DIVIDER
VRS7–VRS0
FREQUENCY
DIVIDER
PRE1–PRE0
OSCSTOPENB
(FROM CONFIG)
(TO: SIM, TIMTB15A, ADC)
PHASE-LOCKED LOOP (PLL)
(TO SIM)
(TO SIM)
RDS3–RDS0
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...