Datasheet

Interrupts
MC68HC711D3 Data Sheet, Rev. 2.1
Freescale Semiconductor 53
Figure 4-4. Processing Flow Out of Reset (Sheet 1 of 2)
2A
BIT X IN
Y
N
XIRQ
Y
N
PIN LOW?
CCR = 1?
BEGIN INSTRUCTION
SEQUENCE
1A
STACK CPU
REGISTERS
SET BITS I AND X
FETCH VECTOR
$FFF4, $FFF5
SET BITS S, I, AND X
RESET MCU
HARDWARE
POWER-ON RESET
(POR)
EXTERNAL RESET
CLOCK MONITOR FAIL
(WITH CME = 1)
COP WATCHDOG
TIMEOUT
(WITH NOCOP = 0)
DELAY 4064 E CYCLES
LOAD PROGRAM COUNTER
WITH CONTENTS OF
$FFFE, $FFFF
(VECTOR FETCH)
LOAD PROGRAM COUNTER
WITH CONTENTS OF
$FFFC, $FFFD
(VECTOR FETCH)
LOAD PROGRAM COUNTER
WITH CONTENTS OF
$FFFA, $FFFB
(VECTOR FETCH)
HIGHEST
PRIORITY
LOWEST
PRIORITY