Datasheet

Operating Modes and Memory
MC68HC711D3 Data Sheet, Rev. 2.1
28 Freescale Semiconductor
$0026
Pulse Accumulator Control
Register (PACTL)
See pages 99 and 102.
Read:
DDRA7 PAEN PAMOD PEDGE DDRA3 I4/O5 RTR1 RTR0
Write:
Reset:00000000
$0027
Pulse Accumulator Count Register
(PACNT)
See page 103.
Read:
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
Write:
Reset: Unaffected by reset
$0028
SPI Control Register
(SPCR)
See page 81.
Read:
SPIE SPE DWOM MSTR CPOL CPHA SPR1 SPR0
Write:
Reset:000001UU
$0029
SPI Status Register
(SPSR)
See page 82.
Read:
SPIFWCOL0MODF0000
Write:
Reset:00000000
$002A
SPI Data I/O Register
(SPDR)
See page 83.
Read:
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
Write:
Reset: Unaffected by reset
$002B
Baud Rate Register
(BAUD)
See page 72.
Read:
TCLR 0 SCP1 SCP0 RCKB SCR2 SCR1 SCR0
Write:
Reset:00000UUU
$002C
SCI Control Register 1
(SCCR1)
See page 70.
Read:
R8 T8 0 M WAKE 0 0 0
Write:
Reset:UU000000
$002D
SCI Control Register 2
(SCCR2)
See page 70.
Read:
TIE TCIE RIE ILIE TE RE RWU SBK
Write:
Reset:00000000
$002E
SCI Status Register
(SCSR)
See page 71.
Read:
TDRE TC RDRF IDLE OR NF FE 0
Write:
Reset:11000000
$002F
SCI Data Register
(SCDR)
See page 69.
Read:
R7/T7 R6/T6 R5/T5 R4/T4 R3/T3 R2/T2 R1/T1 R0/T0
Write:
Reset: Unaffected by reset
$0030
↓
$0038
Reserved RRRRRRRR
$0039
System Configuration Options
Register (OPTION)
See page 49.
Read:
0 0 IRQE DLY CME 0 CR1 CR0
Write:
Reset:00010000
Addr. Register Name Bit 7654321Bit 0
= Unimplemented
R
= Reserved U = Unaffected
Figure 2-2. Register and Control Bit Assignments (Sheet 4 of 5)