Datasheet

General Description
MC68HC711D3 Data Sheet, Rev. 2.1
14 Freescale Semiconductor
Figure 1-1. MC68HC711D3 Block Diagram
1.4 Pin Descriptions
Refer to Figure 1-2, Figure 1-3, and Figure 1-4 for pin assignments.
PORT A
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
MODE CONTROL INTERRUPT CONTROL
MODA/LIR
MODB/V
STBY
RESET IRQ XIRQ/V
PP
XTAL EXTAL E
CLOCK LOGIC
OSCILLATOR
PAI/OC1
OC2/OC1
OC3/OC1
OC4/OC1
IC4/OC5/OC1
IC1
IC2
IC3
TIMER
PULSE ACCUMULATOR
COP
PERIODIC INTERRUPT
4 KBYTES
PD7/R/W
PD6/AS
PD5 PD4 PD3 PD2 PD1 PD0
DATA DIRECTION REGISTER D
PORT D
DATA DIRECTION REGISTER C
PORT C
DATA DIRECTION REGISTER B
PORT B
PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0
PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0
MULTIPLEXED ADDRESS/DATA BUS
192 BYTES STATIC RAM
SERIAL
PERIPHERAL
INTERFACE
(SPI)
SERIAL
COMMUNICATIONS
INTERFACE
(SCI)
MC68HC711D3
CPU CORE
SS SCK MOSI MISO
TxD
RxD
V
SS
V
DD
EV
SS
EPROM OR OTPROM
NOT BONDED IN 40-PIN PACKAGE