Datasheet

Serial Peripheral Interface Timing
MC68HC711D3 Data Sheet, Rev. 2.1
Freescale Semiconductor 119
Figure 9-13. SPI Slave Timing (CPHA = 0)
Figure 9-14. SPI Slave Timing (CPHA = 1)
Note: Not defined but normally MSB of character just received
4
2
5
5
4
1
8
SEE
NOTE
MSB OUT
SLAVE
SLAVE LSB OUT
6 7
MSB IN
10
BIT 6 - - - -1
LSB IN
11
1213 3
9
SCK (CPOL = 0)
(INPUT)
SCK (CPOL = 1)
(INPUT)
MISO
(OUTPUT)
MOSI
(INPUT)
SS
(INPUT)
11
12 13
BIT 6 - - - -1
Note: Not defined but normally LSB of character previously transmitted
4
2
10
6 7
5
5
4
1
8
MSB IN
SEE
NOTE
MSB OUT
10
SLAVE
BIT 6 - - - -1
LSB IN
SLAVE LSB OUT
11
13 12
12 13
3
9
SCK (CPOL = 0)
(INPUT)
SCK (CPOL = 1)
(INPUT)
MISO
(OUTPUT)
MOSI
(INPUT)
SS
(INPUT)
BIT 6 - - - -1