Datasheet

Pulse Accumulator
MC68HC711D3 Data Sheet, Rev. 2.1
Freescale Semiconductor 101
Figure 8-19. Pulse Accumulator
Table 8-7. Pulse Accumulator Timing in Gated Mode
Selected
Crystal
Common XTAL Frequencies
4.0 MHz 8.0 MHz 12.0 MHz
CPU Clock (E) 1.0 MHz 2.0 MHz 3.0 MHz
Cycle Time (1/E) 1000 ns 500 ns 333 ns
(E/2
6
)
(E/2
14
)
1 count -
overflow -
64.0 µs
16.384 ms
32.0 µs
8.192 ms
21.33 µs
5.461 ms
PACNT
8-BIT COUNTER
2:1
MUX
PA7/
ENABLE
OVERFLOW
1
2
INTERRUPT
REQUESTS
INTERNAL
DATA BUS
INPUT BUFFER
AND
EDGE DETECTION
PACTL CONTROL
TFLG2 INTERRUPT STATUSTMSK2 INT ENABLES
PAOVI PAII
DDRA7
PAEN PAMOD PEDGE
PAOVF PAIF
OUTPUT
BUFFER
PAI EDGE
PAEN
E ÷ 64 CLOCK
(FROM MAIN TIMER)
PAI/OC1
FROM
MAIN TIMER
OC1
DISABLE
FLAG SETTING