Datasheet

MC68331TS/D 79
CPR[2:0] — Timer Prescaler/PCLK Select Field
This field selects one of seven prescaler taps or PCLK to be TCNT input.
These registers show condition flags that correspond to various GPT events. If the corresponding inter-
rupt enable bit in TMSK1/TMSK2 is set, an interrupt occurs.
I4/O5F — Input Capture 4/Output Compare 5 Flag
When I4/O5 in PACTL is zero, this flag is set each time TCNT matches the value in TOC5. When I4/O5
in PACTL is one, the flag is set each time a selected edge is detected at the I4/O5 pin.
OCF[4:1] — Output Compare Flags
An output compare flag is set each time TCNT matches the corresponding TOC register. OCF[4:1] cor-
respond to OC[4:1].
ICF[3:1] — Input Capture Flags
A flag is set each time a selected edge is detected at the corresponding input capture pin. ICF[3:1] cor-
respond to IC[3:1].
TOF — Timer Overflow Flag
This flag is set each time TCNT advances from a value of $FFFF to $0000.
PAOVF — Pulse Accumulator Overflow Flag
This flag is set each time the pulse accumulator counter advances from a value of $FF to $00.
PAIF — Pulse Accumulator Flag
In event counting mode, this flag is set when an active edge is detected on the PAI pin. In gated time
accumulation mode, PAIF is set at the end of the timed period.
CFORC/PWMC — Compare Force Register/PWM Control Register C $YFF924
Setting a bit in CFORC causes a specific output on OC or PWM pins. PWMC sets PWM operating con-
ditions.
CPR[2:0] System Clock
Divide-By Factor
000 4
001 8
010 16
011 32
100 64
101 128
110 256
111 PCLK
TFLG1/TFLG2 — Timer Interrupt Flag Registers 1–2 $YFF922
15 14 11 10 8 7 6 5 4 3 2 1 0
I4/O5F OCF ICF TOF 0 PAOVF PAIF 0 0 0 0
RESET:
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
15 11 10 9 8 7 6 4 3 2 1 0
FOC 0
FPWMA FPWMB PPROUT
PPR SFA SFB F1A F1B
RESET:
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
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