Datasheet
MC68331TS/D 75
6.4 GPT Registers
The GPTMCR contains parameters for configuring the GPT.
STOP — Stop Clocks
0 = Internal clocks not shut down
1 = Internal clocks shut down
FRZ1 — Not implemented at this time
FRZ0 — FREEZE Response
0 = Ignore FREEZE
1 = FREEZE the current state of the GPT
STOPP — Stop Prescaler
0 = Normal operation
1 = Stop prescaler and pulse accumulator from incrementing. Ignore changes to input pins.
INCP — Increment Prescaler
0 = Has no meaning
1 = If STOPP is asserted, increment prescaler once and clock input synchronizers once.
SUPV — Supervisor/Unrestricted Data Space
0 = Registers with access controlled by SUPV bit are accessible from either user or supervisor priv-
ilege level.
1 = Registers with access controlled by SUPV bit are restricted to supervisor access only.
IARB — Interrupt Arbitration Field
The IARB field is used to arbitrate between simultaneous interrupt requests of the same priority. Each
module that can generate interrupt requests must be assigned a unique, non-zero IARB field value. Re-
fer to 3.8 Interrupts for more information.
MTR — GPT Module Test Register (Reserved) $YFF902
This address is currently unused and returns zeros if read. It is reserved for GPT factory test.
IPA — Interrupt Priority Adjust
Specifies which GPT interrupt source is given highest internal priority
IPL — Interrupt Priority Level
Specifies the priority level of interrupts generated by the GPT.
IVBA — Interrupt Vector Base Address
Most significant nibble of interrupt vector number generated by the GPT when an interrupt service re-
quest is acknowledged.
GPTMCR — GPT Module Configuration Register $YFF900
15 14 13 12 11 10 9 8 7 6 5 4 3 0
STOP FRZ1 FRZ0 STOPP INCP 0 0 0 SUPV 0 0 0 IARB
RESET:
0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0
ICR — GPT Interrupt Configuration Register $YFF904
15 12 11 10 8 7 4 3 2 1 0
IPA 0 IPL IVBA 0 0 0 0
RESET:
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
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Freescale Semiconductor, Inc.
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