Datasheet

MC68331TS/D 57
Figure 13 QSPI Block Diagram
5.4.1 QSPI Pins
Seven pins are associated with the QSPI. When not needed for a QSPI application, they can be con-
figured as general-purpose I/O pins. The PCS0/SS pin can function as a peripheral chip select output,
slave select input, or general-purpose I/O. Refer to the following table for QSPI input and output pins
and their functions.
QSPI BLOCK
CONTROL
REGISTERS
END QUEUE
POINTER
QUEUE
POINTER
STATUS
REGISTER
DELAY
COUNTER
COMPARATOR
PROGRAMMABLE
LOGIC ARRAY
80-BYTE
QSPI RAM
CHIP SELECT
COMMAND
DONE
4
4
2
BAUD RATE
GENERATOR
PCS[2:1]
PCS0/SS
MISO
MOSI
SCK
M
S
M
S
8/16-BIT SHIFT REGISTER
Rx/Tx DATA REGISTER
MSB LSB
4
4
QUEUE CONTROL
BLOCK
CONTROL
LOGIC
A
D
D
R
E
S
S
R
E
G
I
S
T
E
R
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Freescale Semiconductor, Inc.
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