Datasheet
MC68331TS/D 11
2.5 Signal Function
DSACK[1:0]
SIM Input 0
DSCLK CPU32 Input Serial Clock
DSI CPU32 Input (Serial Data)
DSO CPU32 Output (Serial Data)
EXTAL SIM Input —
FC[2:0] SIM Output —
FREEZE SIM Output 1
HALT
SIM Input/Output 0
IC[4:1] GPT Input —
IFETCH
CPU32 Output —
IPIPE
CPU32 Output —
IRQ[7:1]
SIM Input 0
MISO QSM Input/Output —
MODCLK SIM Input —
MOSI QSM Input/Output —
OC[5:1] GPT Output —
PAI GPT Input —
PC[6:0] SIM Output (Port)
PCS[3:0] QSM Input/Output —
PE[7:0] SIM Input/Output (Port)
PF[7:0] SIM Input/Output (Port)
PQS[7:0] QSM Input/Output (Port)
PCLK GPT Input —
PWMA, PWMB GPT Output —
QUOT SIM Output —
RESET
SIM Input/Output 0
RMC
SIM Output 0
R/W
SIM Output 1/0
RXD QSM Input —
SCK QSM Input/Output —
SIZ[1:0] SIM Output —
SS
QSM Input 0
TSC SIM Input —
TXD QSM Output —
XFC SIM Input —
XTAL SIM Output —
Table 6 MCU Signal Function
Signal Name Mnemonic Function
Address Bus ADDR[23:0] 24-bit address bus
Address Strobe AS
Indicates that a valid address is on the address bus
Autovector AVEC
Requests an automatic vector during interrupt acknowledge
Bus Error BERR
Indicates that a bus error has occurred
Bus Grant BG
Indicates that the MCU has relinquished the bus
Bus Grant Acknowledge BGACK
Indicates that an external device has assumed bus mastership
Breakpoint BKPT
Signals a hardware breakpoint to the CPU
Bus Request BR
Indicates that an external device requires bus mastership
System Clockout CLKOUT System clock output
Chip Selects CS[10:0]
Select external devices at programmed addresses
Table 5 MCU Signal Characteristics (Continued)
Signal Name MCU Module Signal Type Active State
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
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