Datasheet

56F8323 Technical Data, Rev. 17
92 Freescale Semiconductor
Preliminary
Figure 6-10 Overall Control of Pads Using SIM_GPS Control
Figure 6-11 GPIO Peripheral Select Register (SIM_GPS)
6.5.8.1 Reserved—Bits 15–8
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.5.8.2 GPIOC6 (C6)—Bit 7
This bit selects the alternate function for GPIOC6.
0 = TC0 (default)
1 = TXD0
6.5.8.3 GPIOC5 (C5)—Bit 6
This bit selects the alternate function for GPIOC5.
0 = TC1 (default)
•1 = RXD0
6.5.8.4 GPIOB1 (B1)—Bit 5
This bit selects the alternate function for GPIOB1.
0 = MISO0 (default)
•1 = RXD1
Base + $B 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read
0 0 0 0 0 0 0 0
C6 C5 B1 B0 A5 A4 A3 A2
Write
RESET
000000000000 0 0 0 0
GPIOX_PER Register
GPIO Controlled
I/O
Pad Control
SIM_GPS Register
Quad Timer Controlled
SCI Controlled
0
1
0
1