Datasheet

Introduction
56F8323 Technical Data, Rev. 17
Freescale Semiconductor 83
Preliminary
Part 6 System Integration Module (SIM)
6.1 Introduction
The SIM module is a system catchall for the glue logic that ties together the system-on-chip. It controls
distribution of resets and clocks and provides a number of control features. The system integration module
is responsible for the following functions:
Reset sequencing
Clock control & distribution
Stop/Wait control
Pull-up enables for selected peripherals
System status registers
Registers for software access to the JTAG ID of the chip
Enforcing Flash security
These are discussed in more detail in the sections that follow.
6.2 Features
The SIM has the following features:
Flash security feature prevents unauthorized access to code/data contained in on-chip flash memory
Power-saving clock gating for peripherals
Three power modes (Run, Wait, Stop) to control power utilization
Stop mode shuts down the 56800E core, system clock, and peripheral clock
Stop mode entry can optionally disable PLL and Oscillator (low power vs. fast restart)
Wait mode shuts down the 56800E core and unnecessary system clock operation
Run mode supports full part operation
Controls to enable/disable the 56800E core WAIT and STOP instructions
Controls reset sequencing after reset
Software-initiated reset
Four 16-bit registers reset only by a Power-On Reset usable for general-purpose software control
System Control Register
Registers for software access to the JTAG ID of the chip