Datasheet

Peripheral Memory Mapped Registers

56F8323 Technical Data, Rev. 17

Freescale Semiconductor 47

Preliminary

ADCA_OFS 0 $21 Offset Register 0

ADCA_OFS 1 $22 Offset Register 1

ADCA_OFS 2 $23 Offset Register 2

ADCA_OFS 3 $24 Offset Register 3

ADCA_OFS 4 $25 Offset Register 4

ADCA_OFS 5 $26 Offset Register 5

ADCA_OFS 6 $27 Offset Register 6

ADCA_OFS 7 $28 Offset Register 7

ADCA_POWER $29 Power Control Register

ADCA_CAL $2A ADC Calibration Register

Table 4-14 Temperature Sensor Register Address Map

(TSENSOR_BASE = $00 F270)

Temperature Sensor is NOT available in the 56F8123 device

TSENSOR_CNTL $0 Control Register

Table 4-15 Serial Communication Interface 0 Registers Address Map

(SCI0_BASE = $00 F280)

SCI0_SCIBR $0 Baud Rate Register

SCI0_SCICR $1 Control Register

Reserved

SCI0_SCISR $3 Status Register

SCI0_SCIDR $4 Data Register

Table 4-16 Serial Communication Interface 1 Registers Address Map

(SCI1_BASE = $00 F290)

SCI1_SCIBR $0 Baud Rate Register

SCI1_SCICR $1 Control Register

Reserved

SCI1_SCISR $3 Status Register

SCI1_SCIDR $4 Data Register

Table 4-13 Analog-to-Digital Converter Registers Address Map (Continued)

(ADCA_BASE = $00 F200)