Datasheet

56F8323 Technical Data, Rev. 17

42 Freescale Semiconductor

Preliminary

TMRA2_CMPLD2 $29 Comparator Load Register 2

TMRA2_COMSCR $2A Comparator Status and Control Register

Reserved

TMRA3_CMP1 $30 Compare Register 1

TMRA3_CMP2 $31 Compare Register 2

TMRA3_CAP $32 Capture Register

TMRA3_LOAD $33 Load Register

TMRA3_HOLD $34 Hold Register

TMRA3_CNTR $35 Counter Register

TMRA3_CTRL $36 Control Register

TMRA3_SCR $37 Status and Control Register

TMRA3_CMPLD1 $38 Comparator Load Register 1

TMRA3_CMPLD2 $39 Comparator Load Register 2

TMRA3_COMSCR $3A Comparator Status and Control Register

Table 4-9 Quad Timer C Registers Address Map

(TMRC_BASE = $00 F0C0)

TMRC0_CMP1 $0 Compare Register 1

TMRC0_CMP2 $1 Compare Register 2

TMRC0_CAP $2 Capture Register

TMRC0_LOAD $3 Load Register

TMRC0_HOLD $4 Hold Register

TMRC0_CNTR $5 Counter Register

TMRC0_CTRL $6 Control Register

TMRC0_SCR $7 Status and Control Register

TMRC0_CMPLD1 $8 Comparator Load Register 1

TMRC0_CMPLD2 $9 Comparator Load Register 2

TMRC0_COMSCR $A Comparator Status and Control Register

Reserved

TMRC1_CMP1 $10 Compare Register 1

TMRC1_CMP2 $11 Compare Register 2

TMRC1_CAP $12 Capture Register

TMRC1_LOAD $13 Load Register

Table 4-8 Quad Timer A Registers Address Map (Continued)

(TMRA_BASE = $00 F040)