Datasheet

56F8323 Technical Data, Rev. 17
Freescale Semiconductor 3
Preliminary
Rev 14.0
Added information/corrected state during reset in Table 2-2. Clarified external reference crystal
frequency for PLL in Table 10-14 by increasing maximum value to 8.4MHz.
Rev 15.0
Replaced “Tri-stated” with an explanation in State During Reset column in Table 2-2.
Rev. 16
• Added the following note to the description of the TMS signal in Table 2-2:
Note: Always tie the TMS pin to V
DD
through a 2.2K resistor.
• Added the following note to the description of the TRST
signal in Table 2-2:
Note: For normal operation, connect TRST directly to V
SS
. If the design is to be used in a debugging
environment, TRST
may be tied to V
SS
through a 1K resistor.
Rev. 17
Changed the “Frequency Accuracy” specification in Table 10-16 (was ±2.0%, is +2 / -3%).
Document Revision History
Version History Description of Change
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