Datasheet

56F8323 Technical Data, Rev. 17
26 Freescale Semiconductor
Preliminary
PWMA5
(SCLK1)
(GPIOA5)
10 Output
Schmitt
Input/
Output
Schmitt
Input/
Output
In reset,
output is
disabled,
pull-up is
enabled
PWMA5 — This is one of six PWMA output pins.
SPI 1 Serial Clock — In the master mode, this pin serves as an
output, clocking slaved listeners. In slave mode, this pin serves as
the data clock input. A Schmitt trigger input is used for noise
immunity.
Port A GPIO — This GPIO pin can be individually programmed as
an input or output pin.
In the 56F8323, the default state after reset is PWMA5.
In the 56F8123, the default state is not one of the functions offered
and must be reconfigured.
FAULTA0
(GPIOA6)
13 Schmitt
Input
Schmitt
Input/
Output
Input FAULTA0 — This fault input pin is used for disabling selected
PWMA outputs in cases where fault conditions originate off-chip.
Port A GPIO — This GPIO pin can be individually programmed as
an input or output pin.
In the 56F8323, the default state after reset is FAULTA0.
In the 56F8123, the default state is not one of the functions offered
and must be reconfigured.
FAULTA1
(GPIOA7)
14 Schmitt
Input
Schmitt
Input/
Output
Input FAULTA1 — This fault input pin is used for disabling selected
PWMA outputs in cases where fault conditions originate off-chip.
Port A GPIO — This GPIO pin can be individually programmed as
an input or output pin.
In the 56F8323, the default state after reset is FAULTA1.
In the 56F8123, the default state is not one of the functions offered
and must be reconfigured.
FAULTA2
(GPIOA8)
15 Schmitt
Input
Schmitt
Input/
Output
Input FAULTA2 — This fault input pin is used for disabling selected
PWMA outputs in cases where fault conditions originate off-chip.
Port A GPIO — This GPIO pin can be individually programmed as
an input or output pin.
In the 56F8323, the default state after reset is FAULTA2.
In the 56F8123, the default state is not one of the functions offered
and must be reconfigured.
Table 2-2 Signal and Package Information for the 64-Pin LQFP
Signal Name Pin No. Type
State During
Reset
Signal Description