Datasheet
56F8123 Package and Pin-Out Information
56F8323 Technical Data, Rev. 17
Freescale Semiconductor 133
Preliminary
11.2 56F8123 Package and Pin-Out Information
This section contains package and pin-out information for the 56F8123. This device comes in a 64-pin
Low-profile Quad Flat Pack (LQFP). Figure 11-1 shows the package outline for the 64-pin LQFP,
Figure 11-3 shows the mechanical parameters for this package, and Table 11-1 lists the pin-out for the
64-pin LQFP case.
Figure 11-2 Top View, 56F8123 64-Pin LQFP Package
ORIENTATION
MARK
PIN 1
17
33
49
TC0
GPIOA0
GPIOA1
V
CAP
3
V
DD_IO
SS1
MISO1
MOSI1
SCLK1
V
SS
IRQA
GPIOA6
GPIOA7
GPIOA8
GPIOA9
RESET
V
DD_IO
EXTAL
OCR_DIS
V
SS
V
CAP
4
V
DDA_OSC_PLL
V
DDA_ADC
V
REFH
V
SSA_ADC
V
REFLO
V
REFP
V
REFMID
V
REFN
NC
ANA7
XTAL
TC1
GPIOC3
GPIOC2
V
SS
V
DD_IO
TRST
V
CAP
1
TDO
TDI
TMS
TCK
TA0
TA1
TA2
TA3
TC3
V
SS
GPIOA11
V
DD_IO
SS0
MISO0
V
CAP
2
MOSI0
SCLK0
ANA0
ANA1
ANA2
ANA3
ANA4
ANA5
ANA6
GPIOA10