Datasheet

56F8323 Technical Data, Rev. 17
102 Freescale Semiconductor
Preliminary
Part 8 General Purpose Input/Output (GPIO)
8.1 Introduction
This section is intended to supplement the GPIO information found in the 56F8300 Peripheral User
Manual and contains only chip-specific information. This information supercedes the generic information
in the 56F8300 Peripheral User Manual.
8.2 Configuration
There are three GPIO ports defined on the 56F8323/56F8123. The width of each port and the associated
peripheral function is shown in Table 8-1 and Table 8-2. The specific mapping of GPIO port pins is
shown in Table 8-3.
Note: Pins in italics are NOT available in the 56F8123 device.
Table 8-1 56F8323 GPIO Ports Configuration
GPIO Port
Port
Width
Available
Pins in
56F8323
Peripheral Function Reset Function
A12 12
PWM, SPI 1 PWM
B8 8
SPI 0, DEC 0, TMRA, SCI 1 SPI 0, DEC 0
C7 7
XTAL, EXTAL, CAN, TMRC, SCI 0 XTAL, EXTAL, CAN, TMRC
Table 8-2 56F8123 GPIO Ports Configuration
GPIO Port
Port
Width
Available
Pins in
56F8123
Peripheral Function Reset Function
A12 12
SPI 1 Must be reconfigured
B8 8
SPI 0, SCI 1, TMRA SPI 0; other pins must be reconfigured
C7 7
XTAL, EXTAL, TMRC, SCI 0 XTAL, EXTAL, TMRC; other pins must be
reconfigured