Datasheet

Interrupt Vector Table
MC56F825x/MC56F824x Digital Signal Controller, Rev. 3
Freescale Semiconductor 87
CMPA 59 0 - 2 P:0x76 Comparator A Rising/Falling Flag
GPIOF 60 0 - 2 P:0x78 GPIOF Interrupt
GPIOE 61 0 - 2 P:0x7A GPIOE Interrupt
GPIOD 62 0 - 2 P:0x7C GPIOD Interrupt
GPIOC 63 0 - 2 P:0x7E GPIOC Interrupt
GPIOB 64 0 - 2 P:0x80 GPIOB Interrupt
GPIOA 65 0 - 2 P:0x82 GPIOA Interrupt
SWILP 66 -1 P:0x84 SW Interrupt Low Priority
1
Two words are allocated for each entry in the vector table. This does not allow the full address range to be
referenced from the vector table, providing only 19 bits of address.
2
If the VBA is set to the reset value, the first two locations of the vector table overlay the chip reset addresses
because the reset address would match the base of this vector table.
Table 48. Interrupt Vector Table Contents
1
(continued)
Peripheral
Vector
Number
Priority
Level
Vector Base
Address +
Interrupt Function