Datasheet

MC56F825x/MC56F824x Digital Signal Controller, Rev. 3
Specifications
Freescale Semiconductor64
7.19 Queued Serial Communication Interface (SCI) Timing
Figure 24. RXD Pulse Width
Figure 25. TXD Pulse Width
Table 35. SCI Timing
1
1
Parameters listed are guaranteed by design.
Characteristic Symbol Min Max Unit See Figure
Baud rate
2
2
f
MAX
is the frequency of operation of the SCI in MHz, which can be selected system clock (max. 60 MHz) or 2x system clock
(max. 120 MHz) for the MC56F825x/MC56F824x device.
BR — (f
MAX
/16) Mbps —
RXD pulse width RXD
PW
0.965/BR 1.04/BR ns Figure 24
TXD pulse width TXD
PW
0.965/BR 1.04/BR ns Figure 25
LIN Slave Mode
Deviation of slave node clock from
nominal clock rate before
synchronization
F
TOL_UNSYNCH
–14 14 % —
Deviation of slave node clock relative to
the master node clock after
synchronization
F
TOL_SYNCH
–2 2 % —
Minimum break character length T
BREAK
13 — Master node
bit periods
—
11 — Slave node
bit periods
—
RXD
PW
RXD
SCI receive
data pin
(Input)
TXD
PW
TXD
SCI receive
data pin
(Input)